Nonvolatile memory device

ABSTRACT

Provided is a nonvolatile memory device including: a storage element; a switching element electrically connected to the storage element; and a plurality of lead wirings electrically connected to the switching element, all of which are arranged on a substrate having an insulating surface, wherein the switching element includes an organic semiconductor, and the storage element contains a dielectric material and stores information by selecting at least two states including a high impedance state and a low impedance state.

TECHNICAL FIELD

The present invention relates to a nonvolatile memory device including amatrix wiring, a switching element, and a storage element.

BACKGROUND ART

In recent years, electronic devices exploiting organic semiconductormaterials have been developed widely, and many reports have been made onthe development of an organic electro-luminescence (EL) and an organicthin film transistor (TFT), an organic semiconductor laser, and thelike.

Of those, the organic TFT, a kind of organic transistors, does notrequire a high temperature process during its fabrication, and thereforeis promising as a technique with which integrated circuits can beconstructed on an inexpensive substrate made of glass, resin, or thelike at a low cost by employing a printing technique or the like.

Meanwhile, a semiconductor integrated circuit of a nonvolatile memory,which retains information even after its electric power source is turnedoff, has been generally composed of a system formed by using singlecrystalline silicon. However, in recent years, elements and circuitsexploiting noncrystalline silicon such as amorphous silicon orpolycrystalline silicon or utilizing a non-silicon-based semiconductorsuch as an organic semiconductor or a diamond or silicon carbidesemiconductor are rapidly developed.

For example, U.S. Pat. No. 6,034,882 discloses a configuration in whichan impedance is varied by applying to the storage element a writevoltage inducing the breakdown of a dielectric contained in a storageelement, whereby a memory effect is attained.

If such a memory device is fabricated by using the above-mentionedorganic semiconductor element, the fabrication is expected to be at alow cost. However, memory configurations having functions comparativewith those of a flash memory and an electrical erasable programmableread only memory (EEPROM) made of single-crystalline silicon are notdisclosed in the present circumstances.

Further, for example, there is proposed a configuration using aphenomenon in which a current exhibits a binary state at a certain readvoltage due to a threshold voltage shift of an organic transistor asdescribed in Journal of American Chemical Society, 2003, vol. 125, pp.9414-9423. However, an applied voltage and its time period necessary forinducing a sufficient threshold voltage shift for achieving this binarystate are 100 V and 1 minute, respectively, and this is difficult inpractical use.

Moreover, Japanese Patent Application Laid-Open No. 2001-189431discloses a configuration capable of carrying out multi-valued storageby using an organic material for a storage element and fluctuating animpedance of the element with a voltage.

DISCLOSURE OF THE INVENTION

The present invention has been made to solve a problem concerning aconfiguration of the conventional techniques in that it is difficult toconstruct a nonvolatile memory device capable of selecting a desiredcell, on a substrate having an insulating surface made of glass, resin,or the like, in particular, on a substrate which is inexpensive but inturn cannot bear a high temperature process. It is therefore an objectof the present invention to provide a nonvolatile memory device enablinga construction of an integrated circuit on an inexpensive substrate suchas a glass or resin substrate and allowing selection of a desired cell,by adopting an element configuration in which an organic material isused for a switching element and a storage element includes adielectric.

That is, a nonvolatile memory device according to the present inventionincludes: a storage element; a switching element electrically connectedto the storage element; and a plurality of lead wirings electricallyconnected to the switching element or the storage element, all of whichare arranged on a substrate having an insulating surface, in which theswitching element includes an organic semiconductor, and the storageelement contains a dielectric material and stores information byselecting at least two states including a high impedance state and a lowimpedance state.

According to the configuration of the present invention, there isprovided a mechanism capable of selecting a desired cell by theswitching element which includes the organic semiconductor, and furtherit is possible to construct the nonvolatile memory device which has asufficiently large current ratio between two states including “0” and“1” of a memory element, on an inexpensive substrate having aninsulating surface made of glass, resin, or the like, by using aprinting method.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram illustrating a circuit configuration;

FIG. 2 is a graph showing current density/voltage characteristics of amemory element;

FIG. 3 is a histogram showing a breakdown voltage of the memory element;

FIG. 4 is a graph showing current density/voltage characteristics ofstorage elements each having an alumina film with a different thickness;

FIG. 5 is a graph showing a basic operation of a memory element in whichan organic TFT and a storage element are connected to each other;

FIG. 6 is a cross-sectional view of a main part of a memory element anda transistor element according to a first embodiment of the presentinvention;

FIG. 7 is a cross-sectional view of the main part of the memory elementand the transistor element according to the first embodiment of thepresent invention;

FIG. 8 is a cross-sectional view of the main part of the memory elementand the transistor element according to the first embodiment of thepresent invention;

FIG. 9 is a cross-sectional view of the main part of the memory elementand the transistor element according to the first embodiment of thepresent invention;

FIG. 10 is a cross-sectional view of the main part of the memory elementand the transistor element according to the first embodiment of thepresent invention;

FIG. 11 is a cross-sectional view of the main part of the memory elementand the transistor element according to the first embodiment of thepresent invention;

FIG. 12 is a top view of the memory element and the transistor elementaccording to the first embodiment of the present invention; and

FIG. 13 is a circuit diagram illustrating a circuit configurationaccording to a second embodiment of the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

A nonvolatile memory device according to the present invention includesa storage element having a changeable impedance, in which a switchingelement includes an organic semiconductor and the storage elementincludes a dielectric. Herein, the basic operation of the nonvolatilememory device is to vary an impedance of the memory element at a readvoltage when a write voltage higher than the read voltage is applied tothe dielectric in the memory element.

In particular, it is preferable that breakdown occur in the dielectricof the memory element when a write voltage higher than the read voltageis applied to the dielectric, and the impedance of the memory elementirreversibly decrease in the read voltage. According to this,information once written becomes non-rewritable, which is not onlypreferable in the viewpoint of security, but also allows use of a simpledrive method in comparison with EEPROMs.

The switching element is preferably a transistor including an organicsemiconductor. This makes it possible to construct a memory array on aglass or resin substrate which is hardly used in a TFT made of aninorganic semiconductor such as silicon and formed via a hightemperature process or an etching process. Accordingly, selection of adesired memory cell becomes enabled. As the transistor, there are afield effect type transistor, a thin film type transistor, a junctiontype transistor, and so forth, but any of those is usable. The organicsemiconductor includes a material of which Fermi level is present withinits band gap and which has semiconductor properties.

It is particularly preferable that breakdown of the dielectric in thememory element be induced at an applied voltage of 48 V or lower. Thismakes it possible to carry out low voltage drive necessary uponinstallation in a weak current system.

Moreover, when the weak current system is adopted, repeating of a readoperation and a write operation can be coped with, and it is possible tosuppress lowering of its current ratio.

The switching element may be a diode including an organic semiconductor.In this case, a memory device having a relatively simple matrixstructure can be fabricated.

The nonvolatile memory device according to the present inventionincludes a plurality of lead wirings electrically connected to theswitching element or the storage element. The lead wirings have a matrixstructure, and in particular the configuration preferably includes platelines in addition to bit lines and word lines, in which one terminal ofa transistor is connected to one of the bit lines, another terminal ofthe transistor is connected to one of the word lines, and still anotherterminal of the transistor is connected to one of the plate lines viathe memory element. When the plate lines are set to a ground potential,the operation becomes simple. Further, a potential other than the groundpotential may be set so as to adjust the voltage applied to the storageelement.

The nonvolatile memory device according to the present invention doesnot require fabrication involving an etching process with the substratemade of single-crystalline silicon. The satisfactory element can beformed by using a substrate having an insulating surface. In particular,it is preferable to use an inexpensive substrate made of resin or glass.

More preferably, the nonvolatile memory device is formed on a resinsubstrate. This makes it possible to utilize the nonvolatile memorydevice for an IC card or an IC tag. Also, a flexible material such aspolyimide is exploitable.

An electric power source for such an IC card or IC tag may be a powersource which externally supplies electricity to a non-built-in-type ICcard or IC tag, or a battery built in a battery-built-type IC card or ICtag, and its voltage is preferably equal to or higher than the breakdownvoltage of the dielectric. The above IC card or IC tag may be used as anonvolatile memory device in association with a commuter pass, anidentification card, or a package delivery, or may be attached to acartridge for an electrophotographic image forming apparatus such as alaser beam printer or a copying machine (namely, a photosensitive drumor means for containing toner) or attached to a cartridge which containsink for an ink jet printer using a piezoelectric system or a Bubble Jet®system. Such a case is preferable because various pieces of informationor a large quantity of information can be stored before product shipmentor at the time of product use. In addition, it is possible to use glassas well for the substrate.

Hereinafter, embodiments of the present invention are described withreference to the drawings.

First, the configuration of the nonvolatile memory device according tothis embodiment as shown in FIG. 1 will be described.

FIG. 1 shows a configuration of a 16-bit memory device including bitlines BL1 to BL4; word lines WL1 to WL4 intersecting with the bit lines;and unit cells C11 to C44, wherein each unit cell includes one oforganic thin film transistors (TFTS) T11 to T44 arranged in matrix asthe switching elements containing an organic semiconductor, and one ofmemory elements R11 to R44 as the storage elements. Each gate electrodeof the organic TFTs T11 to T44 is connected to a word line, each drainelectrode is connected to a bit line, and each source electrode isconnected to one terminal of one of the memory elements R11 to R44 wherethe other terminal thereof is connected to one of the plate lines PL1 toPL4.

The memory element configuration is a configuration in which adielectric material is interposed between the electrodes. An arrangementexample of the dielectric includes formation of a dielectric thin filmthrough a sputtering method etc., or application of a liquid materialsuch as spin on glass between the electrodes before being dried.Specific examples of the dielectric include: an inorganic dielectricsuch as alumina, tantalum oxide, or silicon oxide; a spin on glassmaterial such as silsesquioxane; a polymeric material such aspolymethylmethacrylate, polystyrene, or polyimide; and an organicdielectric such as a self-assembled molecule having a long-chain alkylskeleton.

Characteristics of a cell including a polyimide substrate as the resinsubstrate and a dielectric interposed between two electrodes made ofcopper and silver in a sandwiching manner will be described below as aspecific example of an embodiment of the storage element. In thisexample, the dielectric is composed of an alumina thin film havingsatisfactory insulating characteristics, which has been formed by asputtering method under a room temperature condition.

FIG. 2 is a graph of plotting applied voltage versus changed currentwith respect to the alumina thin film having a thickness of 14 nminterposed between the two electrodes made of copper and silver, as anexample. Sweeping of the voltage applied between the electrodes isperformed from 0 V to 10 V, but characteristics resulting from the firstsweeping varies from those resulting from the second sweepingsignificantly. In the first sweeping, breakdown occurs at an appliedvoltage of about 5 V, which leads to a low resistance state because thecurrent amount increases on a large scale. In the second sweeping aswell, this low resistance state continues. This resistance change isirreversible, and once the low resistance state is achieved, the stateis not returned to a high resistance state. Therefore, when the readvoltage is set to about 4 V in this memory element, the resistancevalues in the high resistance state and the low resistance statesignificantly differ by about ten orders of magnitude. That is, thisindicates that the impedance irreversibly reduces in the configurationusing the resin substrate.

Regarding the total of 16 memory elements R11 to R44, FIG. 3 shows anexample of a histogram of a voltage causing breakdown as a thresholdvoltage value changing the impedance of the memory element. Thebreakdown voltage has a distribution from 4 V to 6.5 V. Therefore, it isunderstood that the memory array circuit constructed on the resinsubstrate can be driven at a write voltage having a lower limit of 6.5 Vand at a read voltage having an upper limit of 4 V.

Further, it is possible to set a thickness of the insulating film inaccordance with a predetermined write operation voltage and apredetermined read operation voltage. For example, FIG. 4 is a graph ofplotting applied voltage versus changed current when a thickness of thealumina film is set to 19 nm, 23 nm, and 33 nm, as an example. As isapparent from FIG. 4, as the film thickness is larger, the breakdownvoltage is shifted on the higher voltage side, and as the film thicknessis smaller, the breakdown voltage is shifted on the lower voltage side.Therefore, the film thickness is not limited to the above example.

Regarding a cell obtained by forming the switching element, which is anorganic TFT formed as a film by vacuum evaporation using pentacene as anorganic semiconductor material in such a temperature range imparting nothermal damage to a resin substrate, and a memory element composed of astorage element having a dielectric made of alumina on a polyimidesubstrate, FIG. 5 is a graph showing an example of a basic operation ofthe cell. The horizontal axis represents a voltage of the bit lineconnected to the drain electrode of the TFT, and the vertical axisrepresents a current of the bit line. This example is obtained when theorganic TFT is turned on by setting a voltage of the word line connectedto the gate electrode to −25 V. When attention is paid to −10 V of thebit line for example, the current at the first scan before breakdown is2.9 nA and the current at the second scan after the breakdown is 293 nA.Hence, it is confirmed that the current has the two states necessary fora memory operation. More specifically, the organic TFT and thedielectric formed on the resin substrate exert the basic operation ofthe memory element.

Next, a method for driving the memory device of the present inventionwill be described by way of example.

First, the read operation will be explained. Under the condition thateach TFT acts as a p-channel TFT, as a reference potential (“Ref.” inFIG. 1), a voltage of −2 V is applied to a sense amplifier. Next,information in the cell C23 is read as follows. A voltage of −20 V isapplied to the word line WL3, turning the selected transistor T23 on.Then, under the condition that an upper limit of an applied voltage is−4 V, a voltage is applied to the bit line BL2. At this moment, when C23is selected and R23 is in a low-resistance state, the current flows fromBL2 to T23 and to the ground, and the potential of the BL2 becomes closeto the ground potential. Thus, the potential of the bit line BL2 becomeshigher than the reference voltage and the sense amplifier SA2 outputs“1”. On the other hand, when R23 is in a high-resistance state, thecurrent hardly flows from BL2 to T23 and to the ground and the potentialof BL2 becomes close to the power source potential. Thus, the potentialof the bit line BL2 becomes lower than the reference voltage and thesense amplifier SA2 outputs “0”.

Next, the write operation will be described. Under the condition thatR23 is in a high-resistance state as the initial state, a voltage of −20V is applied to the word line WL3 and the selected transistor T23 isturned on. Then, a voltage of −10 V is applied to the bit line BL2. Atthis point, C23 is selected and a voltage not lower than 5 V is appliedto R23, thereby resulting in the fact that the state of R23 isirreversibly shifted to a low-resistance state. By this action,information is written into C23.

Such a nonvolatile memory device can be used as a memory for theconventional IC tag or IC card. In this way, it is possible to produce alow-priced IC tag or IC card. As an application, the device may beattached to a cartridge for an electrophotographic image formingapparatus such as a laser beam printer or a copying machine (i.e., aphotosensitive drum or means for containing toner) or attached to acartridge which contains ink for an ink jet printer using apiezoelectric system,)or a Bubble Jet® system.

First Embodiment

Next, an experimental production processing for a memory device will bedescried as an example of this embodiment. FIGS. 6 to 12 are schematicdiagrams explaining production steps for the memory element according tothis embodiment. Reference numeral 1 denotes a substrate, 2 denotes acontact, 3 denotes a word line lower electrode, 4 denotes a word line, 5denotes a gate electrode, 6 denotes a plate line electrode, 7 denotes abit line electrode, 8 denotes a memory element lower electrode, 9denotes a gate insulating film, 10 denotes a dielectric film, 11 denotesa source electrode, 12 denotes a drain electrode, 13 denotes a memoryelement upper electrode, 14 denotes an organic semiconductor layer, 15denotes a protective film, 16 denotes a bit line, and 17 denotes a plateline.

First of all, the word line electrode 3, the word line 4, the gateelectrode 5, the plate line electrode 6, the bit line electrode 7, andthe memory element lower electrode 8 are formed by etching a copper foilon both surfaces (front and rear faces) of the substrate 1 made ofpolyimide resin as shown in FIG. 6, the bit line 16 and the plate line17 are formed as shown in FIG. 12, and the contact 2 is formed byembedding plating copper in a through hole, whereby a substrate part isprepared. Herein, the gate electrode 5 is connected to the word line 4,the plate line electrode 6 is connected to the plate line 17, and thebit line electrode 7 is connected to the bit line 16.

Next, as shown in FIG. 7, an alumina thin film is formed as the gateinsulating film 9 by a sputtering method. The gate insulating film isselectively formed through a metal mask so as to cover the gateelectrode 5.

Then, as shown in FIG. 8, an alumina thin film is formed as thedielectric film 10 by the sputtering method. The dielectric film isselectively formed through a metal mask so as to cover the memoryelement lower electrode 8.

Subsequently, as shown in FIG. 9, silver electrodes are formed as thesource electrode 11, the drain electrode 12, and the memory elementupper electrode 13 by a screen printing method. At this time, the drainelectrode 12 is connected to the bit line via the bit line electrode 7.Meanwhile, the source electrode 11 is connected to the memory elementlower electrode 8. Further, the memory element upper electrode 13 isconnected to the plate line 17 via the plate line electrode 6.

After that, as shown in FIG. 10, pentacene is subjected to vacuumevaporation for forming the organic semiconductor layer 14. Similarly tothe gate insulating film 9, the organic semiconductor layer 14 isselectively formed through a metal mask on a region sandwiched by thesource electrode 11 and the drain electrode 12 and on a region includinga part of the respective electrodes, that is, formed so as to cover aregion between the electrodes by means of. Next, a novolac resin isapplied and cured as the protective film 15. As a result, the memorydevice including the organic TFT with an electrode arrangement calledbottom contact type, and the memory element is formed on the resinsubstrate by the printing method.

Further, the same effects are also attained by using an organic TFT withan electrode arrangement called top contact type where the organicsemiconductor layer 14 is selectively formed on the gate insulating filmthrough a metal mask and thereafter the source electrode 11 and thedrain electrode 12 are formed on the organic semiconductor layer,although not shown in the drawings.

Moreover, although not shown in the drawings, the bit line is connectedto one terminal of the sense amplifier and outputs “0” when the bit linepotential is lower than the reference potential comparing with thereference potential of the other terminal (low potential: a voltageclose to the power source voltage), and outputs “1” when the bit linepotential is higher than the reference potential (high potential: avoltage close to the ground voltage).

Driving of the thus fabricated memory device will be described on theprecondition that a read operation voltage is −4 V and a write operationvoltage is −10 V.

First, the read operation will be described. A voltage of −2 V isapplied to the sense amplifier as the reference potential (“Ref. in FIG.1). Next, an operation of reading the information in the cell C23 isconducted. A voltage of −20 V is applied to the word line WL3, and theselected transistor T23 is turned-on. Next, a voltage of −4 V is appliedto the bit line BL2. At this moment, when C23 is selected and R23 is ina low-resistance state, the current flows from BL2 to T23, and to theground, making the BL2 potential close to the ground potential.Therefore, the potential of the bit line BL2 becomes higher than thereference potential and the sense amplifier SA2 outputs “1”. On theother hand, when R23 is in a high-resistance state, almost no currentflows from BL2 to T23, and to the ground, and the potential of BL2becomes close to the power source voltage. Therefore, the potential ofthe bit line BL2 becomes lower than the reference potential and thesense amplifier SA2 outputs “0”.

Next, the write operation will be described. Under the condition thatR23 is in a high-resistance state as the initial state, a voltage of −20V is applied to the word line WL3 and selected transistor T23 is turnedon. Then a voltage of −10 V is applied to the bit line BL2. At thismoment, C23 is selected, a voltage not lower than 5 V is applied to R23,and the state of R23 is irreversibly shifted to a low-resistance state.By this operation, information is written into C23.

In the nonvolatile memory device according to this embodiment, a diodecan be used as the switching element, and a junction type transistor canbe used as the switching element.

Second Embodiment

In the nonvolatile memory device according to this embodiment, a diodecan be used as the switching element. FIG. 13 shows an example of theconfiguration of this embodiment. In this embodiment, each cell has aswitching element and a storage element similarly to the firstembodiment. Each cell in the first embodiment has a transistor elementas the switching element, while each cell in the second embodiment has adiode element as the switching element.

As shown in FIG. 13, the nonvolatile memory device of this embodimenthas a plurality of such cells in the row and column directions (from C11to C44). Taking one cell as an example, the cell C11 has a diode D11 anda memory element M11. One end of each memory element is connected to thediode of each cell, and the other end of each memory element is commonlyconnected to a word line WL. There are multiple word lines WL, and eachof them is connected to a plurality of memory elements on acolumn-by-column base. One end of the diode that is not connected to thememory element is commonly connected to one of the bit lines BL. Thereare multiple bit lines BL and each of them is connected to one end of aplurality of diodes on a row-by-row base.

Next, the read operation will be described. For example, in selectingthe cell C22, a constant voltage Vcc is applied to BL2 so that currentflows to the grounded BL2 via the resistor R2. In this occasion, avoltage not lower than Vcc is applied to word lines WL other than WL2 sothat no current flows into cells other than the selected one. At thismoment, by comparing the potential of BL2 with the reference voltageRef., it is possible to read information.

Next, the write operation will be described. For example, in selectingthe cell C22, a constant voltage 2Vcc is applied to BL2 so that currentflows to BL2 via R2. In this occasion, a voltage not lower than 2Vcc isapplied to word lines WL other than WL2 so that no current flows intocells other than the selected one. By this, a large voltage is appliedto the storage element D22 of the selected C22, thereby changing itsimpedance.

Third Embodiment

In this embodiment, similarly to the first embodiment, each cell has theswitching element and the storage element. In the first embodiment, thestorage element contains alumina as the dielectric formed by thesputtering method. In a third embodiment, polyimide which is a polymericmaterial is used as the dielectric. It is confirmed that the obtainedmemory device can be operated similarly to the first embodiment.

This application claims priority from Japanese Patent Application No.2003-421309 filed Dec. 18, 2003, which is hereby incorporated byreference herein.

1. A nonvolatile memory device comprising: a storage element; aswitching element electrically connected to the storage element; and aplurality of lead wirings electrically connected to the switchingelement or the storage element, all of which are arranged on a resinsubstrate, wherein the switching element is an organic transistor havingan active layer composed of an organic semiconductor, and wherein thestorage element contains an insulating thin film and is a storageelement for storing information by changing a high resistance state to alow resistance state under insulation breakdown caused by voltageapplication an impedance of the storage element being irreversiblychanged to the low impedance state by applying a write voltage higherthan a read voltage to the storage element.
 2. (canceled)
 3. Anonvolatile memory device according to claim 1, wherein the switchingelement is an organic transistor including a source electrode, a drainelectrode and a gate electrode, at least one of which is formed in aprint processing of screen printing, offset printing, or micro contactprinting. 4.-11. (canceled)
 12. A nonvolatile memory device according toclaim 1 or 3, wherein the switching element is an organic transistorwhich is formed without using an etching process.
 13. A nonvolatilememory device according to claim 1, wherein the storage element is astorage element comprising a first electrode, an insulating thin filmprovided on the first electrode, and a second electrode provided on theinsulating thin film, an impedance of the storage element beingirreversibly changed to the low impedance state by applying a writevoltage higher than a read voltage to the storage element, and whereinat least one of the first electrode and the second electrodes is formedin a print processing of screen printing, offset printing, or microcontact printing.
 14. A nonvolatile memory device according to any oneof claims 1, 3 and 13, wherein the insulating thin film is formed undera room temperature condition.
 15. A nonvolatile memory device accordingto any one of claims 1, 3 and 13, wherein the insulating thin film is athin film made of aluminum oxide and the film has a thickness of 33 nmor less.
 16. A nonvolatile memory device according to claim 12, whereinthe insulating thin film is formed under a room temperature condition.17. A nonvolatile memory device according to claim 12, wherein theinsulating thin film is a thin film made of aluminum oxide and the filmhas a thickness of 33 nm or less.